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  ? semiconductor components industries, llc, 2006 august, 2006 ? rev. 2 1 publication order number: ncp9004/d ncp9004 2.65 w filterless class?d audio power amplifier the ncp9004 is a cost ? effective mono class ? d audio power amplifier capable of delivering 2.65 w of continuous average power to 4.0 from a 5.0 v supply in a bridge tied load (btl) configuration. under the same conditions, the output power stage can provide 1.4 w to a 8.0 btl load with less than 1% thd+n. for cellular handsets or pdas it offers space and cost savings because no output filter is required when using inductive tranducers. with more than 90% efficiency and very low shutdown current, it increases the lifetime of your battery and drastically lowers the junction temperature. the ncp9004 processes analog inputs with a pulse width modulation technique that lowers output noise and thd when compared to a conventional sigma ? delta modulator. the device allows independent gain while summing signals from various audio sources. thus, in cellular handsets, the earpiece, the loudspeaker and even the melody ringer can be driven with a single ncp9004. due to its low 42 v noise floor, a ? weighted, a clean listening is guaranteed no matter the load sensitivity. features ? optimized pwm output stage: filterless capability ? efficiency up to 90% low 2.5 ma typical quiescent current ? large output power capability: 1.4 w with 8.0 load and thd+n < 1% ? wide supply voltage range: 2.5 ? 5.5 v operating voltage ? high performance, thd+n of 0.03% @ v p = 5.0 v, r l = 8.0 , p out = 100 mw ? excellent psrr ( ? 65 db): no need for voltage regulation ? surface mounted package 9 ? pin flip ? chip csp (snpb and pb ? free) ? fully differential design. eliminates two input coupling capacitors ? very fast turn on/off times with advanced rising and falling gain technique ? external gain configuration capability ? internally generated 250 khz switching frequency ? short circuit protection circuitry ? ?pop and click? noise protection circuitry applications ? cellular phone ? portable electronic devices ? pdas and smart phones ? portable computer http://onsemi.com 9 ? pin flip ? chip csp fc suffix case 499e pin connections 9 ? pin flip ? chip csp 1 a3 b3 c3 a2 b2 c2 a1 b1 c1 gnd inp outm vp sd outp gnd inm marking diagram maq = device code a = assembly location y = year ww = work week  = pb ? free package maq  ayww 1 vp (top view) outm outp cs gnd r i sd inp inm vp input from microcontroller audio input from dac 3.7 mm 1.6 mm solution size cs r i r i r i see detailed ordering and shipping information on page 16 of this data sheet. ordering information
ncp9004 http://onsemi.com 2 typical application bypass data processor gnd outm figure 1. typical application outp r f r i positive differential input inm bypass internal biasing v p bypass r f r i negative differential input inp r l = 8 shutdown control sd v p cs ramp generator battery 300 k v ih v il pin description pin no. symbol type description a1 inp i positive differential input. a2 gnd i analog ground. a3 outm o negative btl output. b1 v p i power analog positive supply. range: 2.5 v ? 5.5 v. b2 v p i power analog positive supply. range: 2.5 v ? 5.5 v. b3 gnd i analog ground. c1 inm i negative differential input. c2 sd i the device enters in shutdown mode when a low level is applied on this pin. an internal 300 k resistor will force the device in shutdown mode if no signal is applied to this pin. it also helps to save space and cost. c3 outp o positive btl output.
ncp9004 http://onsemi.com 3 maximum ratings symbol rating max unit v p supply voltage active mode shutdown mode 6.0 7.0 v v in input voltage ? 0.3 to v cc +0.3 v i out max output current (note 1) 1.5 a p d power dissipation (note 2) internally limited ? t a operating ambient temperature ? 40 to +85 c t j max junction temperature 150 c t stg storage temperature range ? 65 to +150 c r ja thermal resistance junction ? to ? air 90 (note 3) c/w ? ? esd protection human body model (hbm) (note 4) machine model (mm) (note 5) > 2000 > 200 v ? latchup current @ t a = 85 c (note 6)  70 ma msl moisture sensitivity (note 7) level 1 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. the device is protected by a current breaker structure. see ?current breaker circuit? in the description information section for more information. 2. the thermal shutdown is set to 160 c (typical) avoiding irreversible damage to the device due to power dissipation. 3. for the 9 ? pin flip ? chip csp package, the r ja is highly dependent of the pcb heatsink area. for example, r ja can equal 195 c/w with 50 mm 2 total area and also 135 c/w with 500 mm 2 . when using ground and power planes, the value is around 90 c/w, as specified in table. 4. human body model: 100 pf discharged through a 1.5 k resistor following specification jesd22/a114. b2 pin (vp) qualified at 1500 v. 5. machine model: 200 pf discharged through all pins following specification jesd22/a115. 6. latchup testing per jedec standard jesd78. 7. moisture sensitivity level (msl): 1 per ipc/jedec standard: j ? std ? 020a.
ncp9004 http://onsemi.com 4 electrical characteristics (limits apply for t a = +25 c unless otherwise noted) symbol characteristic conditions min typ max unit v p operating supply voltage t a = ? 40 c to +85 c 2.5 ? 5.5 v i dd supply quiescent current v p = 3.6 v, r l = 8.0 v p = 5.5 v, no load v p from 2.5 v to 5.5 v, no load t a = ? 40 c to +85 c ? ? ? 2.15 2.61 ? ? ? 4.6 ma i sd shutdown current v p = 4.2 v t a = +25 c t a = +85 c ? ? 0.42 0.45 0.8 ? a v p = 5.5 v t a = +25 c t a = +85 c ? ? 0.8 0.9 1.5 ? a v sdih shutdown voltage high 1.2 ? ? v v sdil shutdown voltage low ? ? 0.4 v f sw switching frequency v p from 2.5 v to 5.5 v t a = ? 40 c to +85 c 190 250 310 khz g gain r l = 8.0 285 k r i 300 k r i 315 k r i v v rs resistance from sd to gnd ? ? 300 ? k vos output offset voltage v p = 5.5 v ? 6.0 ? mv to n turn on time v p from 2.5 v to 5.5 v ? 9.0 ? ms to ff turn off time v p from 2.5 v to 5.5 v ? 5.0 ? ms ts d thermal shutdown temperature ? ? 160 ? c vn ouput noise voltage v p = 3.6 v, f = 20 hz to 20 khz no weighting filter with a weighting filter ? ? 65 42 ? ? vrms no weighting filter with a weighting filter ? ? 70 48 ? ? vrms po rms output power r l = 8.0 , f = 1.0 khz, thd+n < 1% v p = 2.5 v v p = 3.0 v v p = 3.6 v v p = 4.2 v v p = 5.0 v ? ? ? ? ? 0.32 0.48 0.7 0.97 1.38 ? ? ? ? ? w r l = 8.0 , f = 1.0 khz, thd+n < 10% v p = 2.5 v v p = 3.0 v v p = 3.6 v v p = 4.2 v v p = 5.0 v ? ? ? ? ? 0.4 0.59 0.87 1.19 1.7 ? ? ? ? ? w r l = 4.0 , f = 1.0 khz, thd+n < 1% v p = 2.5 v v p = 3.0 v v p = 3.6 v v p = 4.2 v v p = 5.0 v ? ? ? ? ? 0.49 0.72 1.06 1.62 2.12 ? ? ? ? ? w r l = 4.0 , f = 1.0 khz, thd+n < 10% v p = 2.5 v v p = 3.0 v v p = 3.6 v v p = 4.2 v v p = 5.0 v ? ? ? ? ? 0.6 0.9 1.33 2.0 2.63 ? ? ? ? ? w
ncp9004 http://onsemi.com 5 electrical characteristics (limits apply for t a = +25 c unless otherwise noted) symbol unit max typ min conditions characteristic ? efficiency r l = 8.0 , f = 1.0 khz v p = 5.0 v, p out = 1.2 w v p = 3.6 v, p out = 0.6 w ? ? 91 90 ? ? % r l = 4.0 , f = 1.0 khz v p = 5.0 v, p out = 2.0 w v p = 3.6 v, p out = 1.0 w ? ? 82 81 ? ? % thd+n total harmonic distortion + noise v p = 5.0 v, r l = 8.0 , f = 1.0 khz, p out = 0.25 w v p = 3.6 v, r l = 8.0 , f = 1.0 khz, p out = 0.25 w ? ? 0.05 0.09 ? ? % cmrr common mode rejection ratio v p from 2.5 v to 5.5 v v ic = 0.5 v to v p ? 0.8 v v p = 3.6 v, v ic = 1.0 v pp f = 217 hz f = 1.0 khz ? ? ? ? 62 ? 56 ? 57 ? ? ? db psrr power supply rejection ratio v p_ripple_pk ? pk = 200 mv, r l = 8.0 , inputs ac grounded v p = 3.6 v f = 217 khz f = 1.0 khz ? ? ? 62 ? 65 ? ? db figure 2. test setup for graphs outm outp gnd r i inp inm vp r i c i c i + ? + ? 4.7 f + ? audio input signal load 30 khz low pass filter measurement input power supply ncp9004 notes: 1. unless otherwise noted, c i = 100 nf and r i = 150 k . thus, the gain setting is 2 v/v and the cutoff frequency of the input high pass filter is set to 10 hz. input capacitors are shorted for cmrr measurements. 2. to closely reproduce a real application case, all measurements are performed using the following loads: r l = 8 means load = 15 h + 8 + 15 h r l = 4 means load = 15 h + 4 + 15 h very low dcr 15 h inductors (50 m ) have been used for the following graphs. thus, the electrical load measurements are performed on the resistor (8 or 4 ) in differential mode. 3. for efficiency measurements, the optional 30 khz filter is used. an rc low ? pass filter is selected with (100 , 47 nf) on each pwm output.
ncp9004 http://onsemi.com 6 typical characteristics 0 10 20 30 40 50 60 70 80 90 0 0.5 1.0 1.5 efficiency % p out (w) 160 0 0.5 1.0 die temperature ( c) p out (w) v p = 5 v r l = 4 ncp9004 class ab 1.5 2.0 140 120 100 80 60 40 20 60 0 0.1 0.2 die temperature ( c) p out (w) v p = 3.6 v r l = 8 ncp9004 class ab 0.3 0.4 55 50 45 40 35 30 25 20 20 30 40 50 60 70 80 90 100 0 0.2 0.4 die temperature ( c) p out (w) v p = 5 v r l = 8 ncp9004 class ab figure 3. efficiency vs. p out v p = 5 v, r l = 8 , f = 1 khz figure 4. die temperature vs. p out v p = 5 v, r l = 8 , f = 1 khz @ t a = +25 c figure 5. efficiency vs. p out v p = 3.6 v, r l = 8 , f = 1 khz figure 6. die temperature vs. p out v p = 3.6 v, r l = 8 , f = 1 khz @ t a = +25 c figure 7. die temperature vs. p out v p = 5 v, r l = 4 , f = 1 khz @ t a = +25 c figure 8. efficiency vs. p out v p = 5 v, r l = 4 , f = 1 khz 0 10 20 30 40 50 60 70 80 90 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 efficiency (%) p out (w) v p = 3.6 v r l = 8 ncp9004 class ab 0 10 20 30 40 50 60 70 80 90 100 0 0.5 1.0 efficiency (%) p out (w) v p = 5 v r l = 8 ncp9004 class ab 0.6 0.8 1.0 1.2 1.4 0.5 0.6 0.7 2.0 2.5 ncp9004 v p = 5 v r l = 4 class ab
ncp9004 http://onsemi.com 7 typical characteristics 0.01 0.1 1.0 10 0 0.1 0.2 0.3 0.4 0.5 0.6 thd+n (%) p out (w) v p = 3 v r l = 8 f = 1 khz 0.01 0.1 1.0 10 0 0.2 0.4 0.6 0.8 1.0 1.2 thd+n (%) p out (w) v p = 4.2 v r l = 8 f = 1 khz 0 10 20 30 40 50 60 70 80 90 0 0.4 0.8 1.2 efficiency % p out (w) v p = 3.6 v r l = 4 ncp9004 class ab 0.2 0.6 1.0 100 0 0.2 0.4 die temperature ( c) p out (w) 0.6 0.8 90 80 70 60 50 40 30 20 1.0 v p = 3.6 v r l = 4 ncp9004 class ab figure 9. efficiency vs. p out v p = 3.6 v, r l = 4 , f = 1 khz figure 10. die temperature vs. p out v p = 3.6 v, r l = 4 , f = 1 khz @ t a = +25 c figure 11. thd+n vs. p out v p = 5 v, r l = 8 , f = 1 khz 0.01 0.1 1.0 10 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 figure 12. thd+n vs. p out v p = 4.2 v, r l = 8 , f = 1 khz figure 13. thd+n vs. p out v p = 3.6 v, r l = 8 , f = 1 khz figure 14. thd+n vs. p out v p = 3 v, r l = 8 , f = 1 khz thd+n (%) p out (w) v p = 5.0 v r l = 8 f = 1 khz 0.01 0.1 1.0 10 0 0.2 0.4 0.6 0.8 thd+n (%) p out (w) v p = 3.6 v r l = 8 f = 1 khz
ncp9004 http://onsemi.com 8 typical characteristics 0.1 1.0 10 0 0.1 0.2 0.3 0.4 thd+n (%) p out (w) v p = 2.5 v r l = 4 f = 1 khz 0.5 0.6 0.1 1.0 10 0 0.2 0.4 0.6 0.8 thd+n (%) p out (w) v p = 3 v r l = 4 f = 1 khz 10 0 0.5 1.0 thd+n (%) p out (w) 1.5 2.0 1.0 0.1 0.01 2.5 v p = 5 v r l = 4 f = 1 khz figure 15. thd+n vs. pout v p = 2.5 v, r l = 8 , f = 1 khz figure 16. thd+n vs. pout v p = 5 v, r l = 4 , f = 1 khz figure 17. thd+n vs. pout v p = 4.2 v, r l = 4 , f = 1 khz figure 18. thd+n vs. pout v p = 3.6 v, r l = 4 , f = 1 khz figure 19. thd+n vs. power out v p = 3 v, r l = 4 , f = 1 khz figure 20. thd+n vs. power out v p = 2.5 v, r l = 4 , f = 1 khz 0.01 0.1 1.0 10 0 0.1 0.2 0.3 0.4 thd+n (%) p out (w) v p = 2.5 v r l = 8 f = 1 khz 0.01 0.1 1.0 10 0 0.5 1.0 1.5 2.0 thd+n (%) p out (w) v p = 4.2 v r l = 4 f = 1 khz 0.01 0.1 1.0 10 0 0.4 0.8 1.2 1.4 thd+n (%) p out (w) v p = 3.6 v r l = 4 f = 1 khz 0.2 0.6 1.0 1.0
ncp9004 http://onsemi.com 9 typical characteristics 10 ? 20 100 1000 10000 10000 0 frequency (hz) pssr (db) inputs to gnd r l = 4 v p = 3.6 v v p = 5 v ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 10 ? 20 100 1000 10000 100000 frequency (hz) pssr (db) inputs to gnd r l = 8 v p = 3.6 v v p = 5 v ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 10 0.01 0.1 1.0 10 100 1000 10000 100000 frequency (hz) thd+n (%) v p = 2.5 v v p = 5 v 10 power supply (v) figure 21. output power vs. power supply r l = 8 @ f = 1 khz figure 22. output power vs. power suppy r l = 4 @ f = 1 khz 0.01 0.1 1.0 10 100 1000 10000 100000 figure 23. thd+n vs. frequency r l = 8 , p out = 250 mw @ f = 1 khz figure 24. thd+n vs. frequency r l = 4 , p out = 250 mw @ f = 1 khz figure 25. psrr vs. frequency inputs grounded, r l = 8 , vripple = 200 mvpkpk figure 26. psrr vs. frequency inputs grounded, r l = 4 , vripple = 200 mvpkpk 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 p out (w) 4.5 5.0 thd+n = 10% r l = 8 f = 1 khz thd+n = 1% power supply (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 p out (w) 4.5 thd+n = 10% thd+n = 1% 2.5 3.0 r l = 4 f = 1 khz frequency (hz) thd+n (%) v p = 2.5 v v p = 3.6 v v p = 5 v v p = 3.6 v 5.0
ncp9004 http://onsemi.com 10 typical characteristics 10 10 100 1000 100 1000 1000 0 frequency (hz) noise ( vrms) v p = 5 v r l = 8 no weighting with a weighting 10 10 100 1000 100 1000 10000 frequency (hz) noise ( vrms) v p = 3.6 v r l = 8 no weighting with a weighting 2.5 2.8 3.5 4.5 5.5 power supply (v) shutdown current (na) r l = 8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 2.5 900 3.5 4.5 5.5 power supply (v) shutdown current (na) r l = 8 800 700 600 500 400 300 200 100 0 120 3.5 130 140 150 160 temperature ( c) quiescent current (ma) thermal shutdown v p = 3.6 v r l = 8 3.0 2.5 2.0 1.5 1.0 0.5 0 10 ? 20 100 1000 10000 100000 frequency (hz) cmmr (db) v p = 3.6 v r l = 8 ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 figure 27. psrr vs. frequency v p = 3.6 v, r l = 8 , vic = 200 mvpkpk figure 28. thermal shutdown vs. temperature v p = 5 v, r l = 8 , figure 29. shutdown current vs. power supply r l = 8 figure 30. quiescent current vs. power supply r l = 8 figure 31. noise floor, inputs ac grounded with 1 f v p = 3.6 v figure 32. noise floor, inputs ac grounded with 1 f v p = 5 v
ncp9004 http://onsemi.com 11 8 2.5 3.5 4.5 5.5 power supply (v) turn off time (ms) t a = +85 c 6 7 8 9 10 11 2.5 3.5 4.5 5.5 figure 33. turn on time figure 34. turn off time figure 35. turn on sequence v p = 3.6 v, r l = 8 figure 36. turn off sequence v p = 3.6 v, r l = 8 power supply (v) turn on time (ms) t a = +85 c t a = +25 c t a = ? 40 c 7 6 5 4 t a = ? 40 c t a = +25 c turn on time shutdown signal output differential voltage turn off time shutdown signal output differential voltage 024 20 (ms) 6 8 10 12 14 16 18 0 1 2 10 (ms) 3456 789
ncp9004 http://onsemi.com 12 description information detailed description the basic structure of the ncp9004 is composed of one analog pre ? amplifier, a pulse width modulator and an h ? bridge cmos power stage. the first stage is externally configurable with gain ? setting resistor r i and the internal fixed feedback resistor r f (the closed ? loop gain is fixed by the ratios of these resistors) and the other stage is fixed. the load is driven differentially through two output stages. the differential pwm output signal is a digital image of the analog audio input signal. the human ear is a band pass filter regarding acoustic waveforms, the typical values of which are 20 hz and 20 khz. thus, the user will hear only the amplified audio input signal within the frequency range. the switching frequency and its harmonics are fully filtered. the inductive parasitic element of the loudspeaker helps to guarantee a superior distortion value. power amplifier the output pmos and nmos transistors of the amplifier have been designed to deliver the output power of the specifications without clipping. the channel resistance (r on ) of the nmos and pmos transistors is typically 0.3 . turn on and turn off transitions in order to eliminate ?pop and click? noises during transition, the output power in the load must not be established or cutoff suddenly. when a logic high is applied to the shutdown pin, the internal biasing voltage rises quickly and, 4 ms later, once the output dc level is around the common mode voltage, the gain is established slowly (5.0 ms). this method to turn on the device is optimized in terms of rejection of ?pop and click? noises. thus, the total turn on time to get full power to the load is 9 ms (typical) (see figure 35). the device has the same behavior when it is turned ? off by a logic low on the shutdown pin. no power is delivered to the load 5 ms after a falling edge on the shutdown pin (see figure 36). due to the fast turn on and off times, the shutdown signal can be used as a mute signal as well. shutdown function the device enters shutdown mode when the shutdown signal is low . during the shutdown mode, the dc quiescent current of the circuit does not exceed 1.5 a. current breaker circuit the maximum output power of the circuit corresponds to an average current in the load of 820 ma. in order to limit the excessive power dissipation in the load if a short ? circuit occurs, a current breaker cell shuts down the output stage. the current in the four output mos transistors are real ? time controlled, and if one current exceeds the threshold set to 1.5 a, the mos transistor is opened and the current is reduced to zero. as soon as the short ? circuit is removed, the circuit is able to deliver the expected output power. this patented structure protects the ncp9004. since it completely turns off the load, it minimizes the risk of the chip overheating which could occur if a soft current limiting circuit was used.
ncp9004 http://onsemi.com 13 application information ncp9004 pwm modulation scheme the ncp9004 uses a pwm modulation scheme with each output switching from 0 to the supply voltage. if v in = 0 v outputs outm and outp are in phase and no current is flowing through the dif ferential load. when a positive signal is applied, outp duty cycle is greater than 50% and outm is less than 50%. w ith this configuration, the current through the load is 0 a most of the switching period and thus power losses in the load are lowered. figure 37. output voltage and current waveforms into an inductive loudspeaker dc output positive voltage configuration outp outm load current +vp 0 v ? vp 0 a voltage gain the first stage is an analog amplifier. the second stage is a comparator: the output of the first stage is compared with a periodic ramp signal. the output comparator gives a pulse width modulation signal (pwm). the third and last stage is the direct conversion of the pwm signal with mos transistors h ? bridge into a powerful output signal with low impedance capability. the total gain of the device is typically set to: 300 k r i input capacitor selection (c in ) the input coupling capacitor blocks the dc voltage at the amplifier input terminal. this capacitor creates a high ? pass filter with r in , the cut ? off frequency is given by fc  1 2   r i  c i . when using an input resistor set to 150 k , the gain configuration is 2 v/v. in such a case, the input capacitor selection can be from 10 nf to 1 f with cutoff frequency values between 1 hz and 100 hz. the ncp9004 also includes a built in low pass filtering function. it?s cut off frequency is set to 20 khz. optional output filter this filter is optional due to the capability of the speaker to filter by itself the high frequency signal. nevertheless, the high frequency is not audible and filtered by the human ear. an optional filter can be used for filtering high frequency signal before the speaker. in this case, the circuit consists of two inductors (15 h) and two capacitors (2.2 f) (figure 38). the size of the inductors is linked to the output power requested by the application. a simplified version of this filter requires a 1 f capacitor in parallel with the load, instead of two 2.2 f connected to ground (figure 39). cellular phones and portable electronic devices are great applications for filterless class ? d as the track length between the amplifier and the speaker is short, thus, there is usually no need for an emi filter. however, to lower radiated emissions as much as possible when used in filterless mode, a ferrite filter can often be used. select a ferrite bead with the high impedance around 100 mhz and a very low dcr value in the audio frequency range is the best choice. the mpz1608s221a1 from tdk is a good choice. the package size is 0603.
ncp9004 http://onsemi.com 14 outm outp r l = 8 2.2 f 2.2 f 15 h 15 h outm outp r l = 8 1.0 f 15 h 15 h figure 38. advanced optional audio output filter figure 39. optional audio output filter outm outp r l = 8 figure 40. optional emi ferrite bead filter ferrite chip beads figure 41. ncp9004 application schematic with fully differential input configuration figure 42. ncp9004 application schematic with fully differential input configuration and ferrite chip beads as an output emi filter outm outp cs gnd r i sd inp inm vp input from microcontroller differential audio input from dac r i outm outp cs gnd r i sd inp inm vp input from microcontroller differential audio input from dac r i ferrite chip beads
ncp9004 http://onsemi.com 15 figure 43. ncp9004 application schematic with single ended input configuration figure 44. ncp9004 application schematic with differential input configuration and high pass filtering function outm outp cs gnd r i sd inp inm vp input from microcontroller differential audio input from dac r i ferrite chip beads c i c i outm outp cs gnd r i sd inp inm vp input from microcontroller single ? ended audio input from dac r i c i c i pcb layout information ncp9004 is suitable for low cost solution. in a very small package it gives all the advantages of a class ? d audio amplifier. due to its fully differential capability, the audio signal can only be provided by an input resistor. if a low pass filtering function is required, then an input coupling capacitor is needed. the values of these components determine the voltage gain and the bandwidth frequency. the battery positive supply voltage requires a good decoupling capacitor versus the expected distortion. when the board is using ground and power planes with at least 4 layers, a single 4.7 f filtering ceramic capactior on the bottom face will give optimized performance. a 1.0 f low esr ceramic capacitor can also be used with slightly degraded performances on the thd+n from 0.06% up to 0.2%. in two layer application, if both v p pins are connected on the top layer, two decoupling capacitors will improve the thd+n level. for example, a pair of capactors, 470 nf and 4.7 f, are good choices for filtering the power supply. the ncp9004 power audio amplifier can operate from 2.5 v until 5.5 v power supply. with less than 2% thd+n, it delivers 500 mw rms output power to a 8.0 load at v p =3.0 v and 1.0 w rms output power at v p = 4.0 v.
ncp9004 http://onsemi.com 16 figure 45. top layer note: this track between vp pins is only needed when a 2 layers board is used. in case of a typical 4 or more layers, the use of laser vias in pad will optimize the thd+n floor. note ordering information device marking package shipping ? NCP9004FCT1G maq 9 ? pin flip ? chip csp (pb ? free) 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp9004 http://onsemi.com 17 package dimensions 9 ? pin flip ? chip csp fc suffix case 499e issue o dim min max millimeters a 0.540 0.660 a1 0.210 0.270 a2 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. coplanarity applies to spherical crowns of solder balls. e d ? a ? ? b ? 0.10 c a2 a a1 ? c ? 0.05 c 0.10 c 4 x seating plane d1 e e1 e 0.05 c 0.03 c a b 9 x b c b a 12 3 d 1.450 bsc e 0.330 0.390 b 0.290 0.340 e 0.500 bsc d1 1.000 bsc e1 1.000 bsc 1.450 bsc  mm inches  scale 20:1 0.265 0.01 0.50 0.0197 0.50 0.0197 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ncp9004/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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